Delay and power calculation standards -- Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries

Die Norm herausgegeben am 1.1.2004

Delay and power calculation standards -- Part 1: Integrated circuit delay and power calculation systems

UNGÜLTIG herausgegeben am 1.12.2002

Design automation. Part 1: VHDL language reference manual

UNGÜLTIG herausgegeben am 1.8.2001

Behavioural languages. Part 2: VHDL multilogic system for model interoperability

UNGÜLTIG herausgegeben am 1.7.2002

Behavioural languages. Part 3-2: Mathematical operation in VHDL

UNGÜLTIG herausgegeben am 1.7.2002

Behavioural languages. Part 3-3: Synthesis in VHDL

UNGÜLTIG herausgegeben am 1.7.2002

Design automation. Part 1: Standard test language for all systems. Common abbreviated test language for all systems (C/ATLAS)

Die Norm herausgegeben am 1.11.2001

Electronic Design Interchange Format (EDIF). Version 3 0 0 (IEC 61690- 1:2000)

Die Norm herausgegeben am 1.11.2001

Electronic Design Interchange Format (EDIF). Part 2: Version 4 0 0 (IEC 61690-2:2000)

Die Norm herausgegeben am 1.11.2001

Electronic design automation libraries -- Part 1: Input/Output buffer information specifications (IBIS version 3.2)

UNGÜLTIG herausgegeben am 1.12.2002